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Integrated Circuit Systems, Inc.
ICS91720
Low EMI, Spread Modulating, Clock Generator
Features: Pin Configuration * ICS91720 is a Spread Spectrum Clock targeted for 8 PD#* CLKIN 1 Mobile PC and LCD panel applications that generates an EMI-optimized clock signal (EMI peak 7 SCLK VDD 2 reduction of 7-14 dB on 3rd-19th harmonics) through 6 SDATA GND 3 use of Spread Spectrum techniques. 5 REF_OUT/FS_IN1* **CLKOUT/FS_IN0 4 * ICS91720 focuses on the lower input frequency range of 14.318 to 80.00 MHz with a spread 8 Pin SOIC/TSSOP modulation of 20kHz to 40kHz. * Internal Pull-Up Resistor ** Internal Pull-Down Resistor Specifications: * * * * * * * Supply Voltages: VDD = 3.3V 0.3V Frequency range: 14.318 MHz Fin 80 MHz Cyc to Cyc jitter: <150ps Output duty cycle 45-55% Guarantees +85C operational condition. 8-pin SOIC/TSSOP Reference input
Functionality
FSIN_1 FSIN_0 MHz 0 0 14.318 MHz in --> 27MHz out 0 1 14.318MHz -->14.318MHz out 1 0 27.00MHz in --> 27.00MHz out 1 1 48.00MHz in -->48.00 MHz out Spread % default -0.8 down spread -1.00 down spread -1.25 down spread -0.8 down spread
Block Diagram
REFOUT CLKIN PLL1 Spread Spectrum Spectrum CLKOUT CLKOUT
PD# SDATA SD SCLK FS_IN0:1
Control Logic Config. Reg.
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ICS91720
Pin Description
PIN # 1 2 3 PIN NAME CLKIN VDD GND PIN TYPE PWR IN OUT DESCRIPTION
Input for reference clock. Power supply, nominal 3.3V Ground pin. Modulated clock output. 4 **CLKOUT/FS_IN0 I/O Frequency select latch input. Refer to the functionality table. Un-modulated 3.3V reference clock output. 5 REF_OUT/FS_IN1* I/O Frequency select latch input. Refer to the functionality table. 6 SDATA PWR Data pin for I2C circuitry 5V tolerant 7 SCLK PWR Clock pin of I2C circuitry 5V tolerant Asynchronous active low input pin used to power down the device into a low power state. The internal clocks are disabled and the VCO and the 8 PD#* PWR crystal are stopped. The latency of the power down will not be greater than 1.8ms. * Internal Pull-Up Resistor ** Internal Pull-Down Resistor
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ICS91720
Table 1: Frequency Configuration Table (See I2C Byte 0)
FS4
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
FS3
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
FS2
0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
FS1
0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
FS0
0 1 0 1 0 1
Sprd Type Sprd %
DOWN SPREAD (-) 0.60 0.80 1.00 1.25 1.50 2.00 0.50 1.00 0.60 1.00 -0.80 +/-0.3 1.50 1.75 2.00 2.50 3.00 -1.25 0.40 0.50 0.70 1.00 1.20 1.50 0.60 0.80 1.00 1.25 1.50 2.00 0.50 1.00
14in/27out
0 CENTER SPD (+/-) 1 0 1 0 DOWN SPREAD (-)
14in/14out 27in/27out
48in/48out 66in/66out
1 CNTR SPD 0 1 DOWN 0 SPREAD 1 (-) 0 1 0 1 CENTER 0 SPREAD 1 (+/-) 0 1 0 1 DOWN 0 SPREAD 1 (-) 0 1 0 CENTER SPD (+/-) 1
Above is the hard coded 5 bit (32 entry) ROM table. FS2:0 are ONLY accessible through I2C software programming bits (byte0 bits5:7). FS3 and FS4 can also be decoded from FS_IN0:1 latched input hardware pins. FS_IN0 FS3 and FS_IN1 FS4. Upon power-up the default is to use hardware selections of FS_IN0:1 latched values. FS2 = 0, FS1 = 0, FS0 = 1 upon power-up (refer to the functionality table on page 1). To access non-default spread entries in the ROM, byte0 programming should be used. In order to change the power up default of FS_IN1:0 = 10 (-1.25% down spread) to any other spread % entry, first change byte0bit 0 to software selection by switching this bit to a `1' and then program the desired percentage by changing byte0 bits 7:3.
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ICS91720
General I2C serial interface information How to Write:
Controller (host) sends a start bit. Controller (host) sends the write address D4 (H) ICS clock will acknowledge Controller (host) sends the begining byte location = N ICS clock will acknowledge Controller (host) sends the data byte count = X ICS clock will acknowledge Controller (host) starts sending Byte N through Byte N + X -1 (see Note 2) * ICS clock will acknowledge each byte one at a time * Controller (host) sends a Stop bit * * * * * * * *
How to Read:
* * * * * * * * * * * * * * Controller (host) will send start bit. Controller (host) sends the write address D4 (H) ICS clock will acknowledge Controller (host) sends the begining byte location = N ICS clock will acknowledge Controller (host) will send a separate start bit. Controller (host) sends the read address D5 (H) ICS clock will acknowledge ICS clock will send the data byte count = X ICS clock sends Byte N + X -1 ICS clock sends Byte 0 through byte X (if X(H) was written to byte 8). Controller (host) will need to acknowledge each byte Controllor (host) will send a not acknowledge bit Controller (host) will send a stop bit
Index Block Write Operation
Controller (Host) starT bit T Slave Address D4(H) WR WRite Beginning Byte = N ACK Data Byte Count = X ACK Beginning Byte N ACK X Byte ICS (Slave/Receiver)
Index Block Read Operation
Controller (Host) T starT bit Slave Address D4(H) WR WRite Beginning Byte = N ACK RT Repeat starT Slave Address D5(H) RD ReaD ACK Data Byte Count = X ACK Beginning Byte N ACK X Byte ICS (Slave/Receiver)
ACK
ACK
Byte N + X - 1 ACK P stoP bit
Byte N + X - 1 N P
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Not acknowledge stoP bit
4
ICS91720
Byte 0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
Pin # -
Bit 0 Byte 1 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Byte 2 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Affected Pin Name Control Function FS0 Spread/FS0 FS1 Spread/FS1 FS2 Spread/FS2 FS3 Spread/FS3 FS4 FS4 PD# Tri_Sate PD# Tri_Sate Spread Enable Spread Enable Spread Spectrum Control FS 3:4 Hard/Software HW/SW Control Select Affected Pin Name Control Function REF_OUT REF_OUT_Enable REF_OUT Slew Rate REF-OUT FS-IN_1 FS-IN_1 Readback FS-IN_0 FS-IN_0 Readback CLK_OUT Slew Rate CLK-OUT CLK_OUT CLK_OUT_Enable (Reserved) (Reserved) (Reserved) (Reserved) Affected Pin Name Control Function (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved)
Type RW RW RW RW RW RW RW
Bit Control 0 1 Spread percentage See Table 1 These are I2C bits only Hi-Z OFF LOW ON
PWD 1 0 0 0 0 1 1
RW
HW
SW
0
Pin # -
Type RW RW R R RW RW R R
Bit Control 0 1 Disable Enable Nominal Fast Nominal Fast Disable Enable Bit Control 0 1 -
PWD 1 1 X X 1 1 1 1
Pin # x x x x x x x x
Type RW RW RW RW RW RW RW
PWD 1 1 1 1 1 1 1 1
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ICS91720
Byte 3 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Byte 4 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Byte 5 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Affected Pin Pin # X X X X x X X X Name (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) Control Function (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) Type RW RW RW RW RW RW RW RW
Bit Control 0 1 PWD 1 1 1 1 1 1 1 1
Pin # X X X X X X X X
Affected Pin Name Control Function (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) Affected Pin Name Control Function (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved)
Type RW RW RW RW RW RW RW RW
Bit Control 0 1 Bit Control 0 1 -
PWD 1 1 1 1 1 1 1 1
Pin # X X X X X X X X
Type RW RW RW RW
PWD 1 1 1 1 1 1 1 1
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ICS91720
Byte 6 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Pin # X X X X X X X X
Affected Pin Name Control Function Revision ID Bit 3 (Reserved) Revision ID Bit 2 (Reserved) (Reserved) Revision ID Bit 1 (Reserved) Revision ID Bit 0 (Reserved) Vendor ID Bit 3 (Reserved) Vendor ID Bit 2 (Reserved) Vendor ID Bit 1 (Reserved) Vendor ID Bit 0
Type R R R R R R R R
Bit Control 0 1 -
PWD 1 1 1 1 1 1 1 1
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ICS91720
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . Voltage on any pin with respect to GND . . . Storage Temperature . . . . . . . . . . . . . . . . . . . . Operating Temperature . . . . . . . . . . . . . . . . . . Ambient Operating Temperature under Bias . Power Dissipation . . . . . . . . . . . . . . . . . . . . . . 3.3 V -0.5 to +7.0 V -55C to +125C 0C to +85C -55 to +125 C 0.5 W
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 85C; Supply Voltage VDD = 3.3 V +/-5% PARAMETER SYMBOL CONDITIONS Input High Voltage VIH Input Low Voltage VIL Input High Current IIH VIN = VDD IIL1 VIN = 0 V; Inputs with no pull-up resistors Input Low Current Powerdown Current IDD3.3PD Fi VDD = 3.3 V Input Frequency Lpin Pin Inductance Logic Inputs CIN 1 COUT Output pin capacitance Input Capacitance CINX X1 & X2 pins Transition time1 Ttrans To 1st crossing of target frequency 1 Ts From 1st crossing to 1% target frequency Settling time TSTAB From VDD = 3.3 V to 1% target frequency Clk Stabilization1 Delay1 tPZH,tPZL Output enable delay (all outputs)
1
MIN 2 VSS - 0.3 -5 -5 14.318
TYP
MAX VDD + 0.3 0.8 5 5 80 7 5 6 45 3 3 3 10
3 -
27
36
1
UNITS V V mA mA mA MHz nH pF pF pF ms ms ms ns
Guaranteed by design, not 100% tested in production.
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ICS91720
Electrical Characteristics - CLKOUT
TA = 0 - 85C; VDD = 3.3V +/-5%; CL = 10-20 pF (unless otherwise specified) PARAMETER SYMBOL CONDITIONS Output High Voltage VOH3 IOH = -1 mA Output Low Voltage VOL3 IOL = 1 mA Rise Time tr3 VOL = 0.41V, VOH = 0.86V Fall Time tf3 VOH = 0.86V VOL = 0.41V measurement from differential wavefrom dt3 Duty Cycle 0.35V to +035V tjcyc-cyc1 VT = 50% Jitter, Cycle to cycle
1
MIN 2.4 0.5 0.5 45
TYP
MAX 0.4 1 1 55 150
UNITS V ns ns % ps
0.6 0.6 50 50
Guaranteed by design, not 100% tested in production.
Electrical Characteristics - REF
TA = 0 - 85C; VDD = 3.3V +/-5%; CL = 10-20 pF (unless otherwise specified) PARAMETER SYMBOL CONDITIONS Output Frequency FO1 VO = VDD*(0.5) Output Impedance RDSP11 1 IOH = -1 mA Output High Voltage VOH 1 IOL = 1 mA Output Low Voltage VOL V OH@MIN = 1.0 V, V OH@MAX = 3.135 V Output High Current IOH1 1 VOL @MIN = 1.95 V, VOL @MAX = 0.4 V Output Low Current IOL VOL = 0.4 V, VOH = 2.4 V Rise Time tr11 1 VOH = 2.4 V, VOL = 0.4 V Fall Time tf1 1 Duty Cycle VT = 1.5 V dt1 tjcyc-cyc1 VT = 1.5 V Jitter
1
MIN 20 2.4 -29 29 1 1 45
TYP 48
MAX 60 0.4 -23 27 2 2 55 300
1.2 1.2 51 105
UNITS MHz V V mA mA ns ns % ps
Guaranteed by design, not 100% tested in production.
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9
ICS91720
150 mil (Narrow Body) SOIC
SYMBOL A A1 B C D E e H h L N In Millimeters COMMON DIMENSIONS MIN MAX 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 SEE VARIATIONS 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 SEE VARIATIONS 0 8 In Inches COMMON DIMENSIONS MIN MAX .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 SEE VARIATIONS .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 SEE VARIATIONS 0 8
VARIATIONS N 8 D mm. MIN 4.80 MAX 5.00 D (inch) MIN MAX .1890 .1968
Reference Doc.: JEDEC Publication 95, MS-012
8-pin SOIC
10-0030
Ordering Information
ICS91720yMLF-T
Example:
ICS XXXX y M LF- T
Designation for tape and reel packaging Lead Free (Optional) Package Type M = SOIC Revision Designator (will not correlate with datasheet revision) Device Type Prefix ICS = Standard Device
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10
ICS91720
N
c
4.40 mm. Body, 0.65 mm. Pitch TSSOP (173 mil) (25.6 mil)
SYMBOL
L
INDEX AREA
E1
E
12 D
A A1 A2 b c D E E1 e L N
aaa
A A1
In Millimeters COMMON DIMENSIONS MIN MAX -1.20 0.05 0.15 0.80 1.05 0.19 0.30 0.09 0.20 SEE VARIATIONS 6.40 BASIC 4.30 4.50 0.65 BASIC 0.45 0.75 SEE VARIATIONS 0 8 -0.10
In Inches COMMON DIMENSIONS MIN MAX -.047 .002 .006 .032 .041 .007 .012 .0035 .008 SEE VARIATIONS 0.252 BASIC .169 .177 0.0256 BASIC .018 .030 SEE VARIATIONS 0 8 -.004
A2
VARIATIONS N
-C-
D mm. MIN 2.90 MAX 3.10 MIN .114
D (inch) MAX .122
8
Reference Doc.: JEDEC Publication 95, MO-153
10-0035
e
b
SEATING PLANE
aaa C
8-pin TSSOP
Ordering Information
ICS91720yGLF-T
Example:
ICS XXXX y G LF- T
Designation for tape and reel packaging Lead Free (Optional) Package Type G = TSSOP Revision Designator (will not correlate with datasheet revision) Device Type Prefix ICS = Standard Device
0698D--10/05/04
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